d-Matrix Adopts NVIDIA NVLink Fusion for Raptor XPUs

AI inference chip specialist d-Matrix has announced that its next-generation Raptor XPUs will connect to NVIDIA's AI infrastructure platform through NVLink Fusion. The integration pairs d-Matrix's inference silicon with NVIDIA's NVLink scale-up interconnect and Spectrum-X scale-out networking, allowing the company to build rack-scale systems on top of NVIDIA's interconnect ecosystem. The announcement places d-Matrix among a widening group of partners designing hardware around NVIDIA's interconnect standards rather than competing with them. That positioning is increasingly important as the industry shifts its attention from raw compute throughput to how efficiently large models can be served across many chips. For inference workloads in particular, interconnect bandwidth and latency often determine real-world performance. Serving a large language model across a rack of accelerators requires constant, high-speed communication between chips, and bottlenecks there can erase gains from faster individual processors. By adopting NVLink Fusion, d-Matrix gains a proven, high-bandwidth fabric for scale-up communication while Spectrum-X handles scale-out traffic between racks. The move also signals a broader trend: NVIDIA is positioning its interconnect technology as a foundation layer that other chipmakers can build upon, extending its influence beyond its own GPUs. For d-Matrix, the partnership could accelerate adoption among data center operators already standardized on NVIDIA infrastructure, reducing integration friction and shortening deployment timelines. Details on timing, performance figures, and which customers will deploy Raptor-based systems first remain limited. Still, the announcement underscores a key reality of the AI data center era: as models grow and inference demand surges, the network connecting the chips may matter as much as the chips themselves.